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Publication
IEEE Electron Device Letters
Paper
High-performance 0.07-μm CMOS with 9.5-ps gate delay and 150 GHz fT
Abstract
We report room-temperature 0.07-μm CMOS inverter delays of 13.6 ps at 1.5 V and 9.5 ps at 2.5 V for SOI substrate; 16 ps at 1.5 V and 12 ps at 2.5 V for bulk substrate. This is the first room-temperature sub-10 ps inverter ring oscillator delay ever reported. PFET with very high drive current and reduction in parasitic resistances and capacitances for both NFET and PFET, realized by careful thermal budget optimization, contribute to the fast device speed. Moreover, the fast inverter delay was achieved without compromising the device short-channel characteristics. At Vdd = 1.5 V and Ioff ∼ 2.5 nA/μm, minimum Leff is about 0.085 μm for NFET and 0.068 μm for PFET. PFET Ion is 360 μA/μm, which is the highest PFET Ion ever reported at comparable Vdd and Ioff. The SOI MOSFET has about one order of magnitude higher Ioff than bulk MOSFET due to the floating-body effect. At around 0.07 μm Leff, the NFET cut-off frequencies are 150 GHz for SOI and 135 GHz for bulk. These performance figures suggest that subtenth-micron CMOS is ready for multi-gigahertz digital circuits, and has a good potential for RF and microwave applications.