Conference paper
Graphene-based fast electronics and optoelectronics
Ph. Avouris, Yu-Ming Lin, et al.
IEDM 2010
A bulk silicon divide-by-two dynamic frequency divider with maximum clock speed of 26.5 GHz has been achieved. The dynamic divider operates from 6.5 GHz to 26.5 GHz. The design is based on n-channel MOSFET's with an effective gate length of 0.1 µm. © 2000, The Institute of Electrical and Electronics Engineers, Inc. All rights reserved.
Ph. Avouris, Yu-Ming Lin, et al.
IEDM 2010
Yu-Ming Lin, Damon B. Farmer, et al.
IEEE Electron Device Letters
Keith A. Jenkins, Pong-Fei Lu
Microelectronics Reliability
Joachim N. Burghartz, Keith A. Jenkins, et al.
IEEE Electron Device Letters