High-density data-retention power gating structure using a four-terminal double-gate device

Abstract

This paper presents a new power gating structure with robust data retention capability using only one single double-gate device to provide both power gating switch and virtual supply/ground diode clamp functions. The scheme reduces the transistor count, area, and capacitance of the power gating structure, thus improving circuit performance, power, and leakage. The scheme is compared to the conventional power gating structure via mixed-mode physics-based two-dimensional numerical simulations. Analysis of virtual ground bounce for the proposed scheme is also presented.