Femtojoule Josephson Tunneling Logic Gates

Abstract

The design of Josephson tunneling logic (JTL) gates capable of performing the logic functions of AND, OR, INVERT, and CARRY is considered. The design equations were solved for a rectangular Josephson junction in which the geometry was adjusted to ensure that all logical inputs were equivalent. Experimental JTL gates were found to operate with a logic delay of less than 200 PS and with a power-delay product of the order of five femtojoules. Copyright © 1974 by The Institute of Electrical and Electronics Engineers, Inc.