A josephson tunnelling logic adder

Abstract

The design of a one-bit full adder circuit based on a family of simple Josephson logic gates is considered. The adder circuit was fabricated using a 25μm minimum linewidth technology and was found to operate, even with the large devices used, with an add time far superior to existing semiconductor adder circuits. Coppyright © 1974 by The Institute of Electrical and Electronics Engineers, Inc.