Publication
HCS 2016
Conference paper

Encoder logic for reducing serial I/O power in sensors and sensor hubs

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Abstract

Communicating data from sensors such as gyroscopes and accelerometers, to processors, typically occurs over printed circuit board traces. This communication can cost up to 40 μW at data rates of 1 Mb/s. VDBS encoding reduces signal transitions and thus reduces the dynamic power dissipation of sensor communication. Because they require no decoder logic, VDBS-enhanced sensors can be used with unmodified existing processors and can leverage existing serial interface standards. We present vdbs2rtl, a tool for generating RTL for the optimal VDBS encoders in both VHDL and Verilog.

Date

30 May 2017

Publication

HCS 2016

Authors

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