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Publication
ITW 2009
Conference paper
Encoding efficiency of digital number representations under deviation constraints
Abstract
When logic upsets (faults) affect digital representations of numbers, it is possible to consider their effects in terms of the magnitude of the value deviation they induce. When some upper limit on such a change in value is tolerable, one may consider techniques for encoding to limit value deviations in the presence of faults. Examples of applications with tolerance to value deviation include computer graphics computations, and the computation, communication and storage of analog sensor values in sensor networks. This article presents upper bounds for the achievable efficiency of encoding under the constraint relaxation of a tolerable value deviation. Closed-form expressions and numerical evaluations for upper bounds on the achievable encoding efficiency under a maximum tolerable value deviation, for several different conditions under which logic upsets may occur, are presented. The bounds demonstrate the possibility of significant gains in encoding efficiency, when some semantic deviation of values is tolerable. Lower and upper bounds on the possible absolute value of deviation resulting from a given number of upsets in words of a known size are provided. It is shown that, if possible to bias the physical design of a system such that logic upsets in both high and low logic direction may occur simultaneously (versus only one or the other), the minimum values of the resulting deviations will be reduced. © 2009 IEEE.