Electron beam lithography of sub-0.1μm circuits

Abstract

This paper describes the high resolution electron beam system and the lithography processes developed for the fabrication of ultra high speed, sub-0.1μm silicon FET circuits and other projects where complex multi-level structures with highly accurate overlay are required. Noise sources and short term instability in the lithography tool have been reduced to less than 4nm peak-to-peak, while still accepting 125mm wafers. Devices and circuits have been fabricated with 70nm polysilicon gates and level-to-level overlay of typically 30nm over a 250μm field. The devices have yielded record transconductance results of more than 910mS/mm at 77 K, and have shown clear evidence of velocity overshoot. Device switching speeds of 13 picoseconds have been observed in ring oscillator circuits. © 1989.