Photovoltaic devices were fabricated at IBM T J Watson Research Center using a research line designed to run different substrate types concurrently. The process knowledge gained from CMOS IC fabrication is applied to solar cell fabrication to create cells with plated Cu front metallization, AI back contacts, and PECVD SiN ARC. The interaction between substrate type and process conditions for saw damage etch, PECVD SiN deposition and emitter formation (thermal budget exposure) is presented in this paper. Electroplating process characterization results are discussed. The effects on the electrical characteristics of the photovoltaic device due to the process parameters chosen, and due to extrinsic defects, are discussed. © 2010 IEEE.