Low thermal budget antimony/phosphorus NMOS technology for CMOS
D.L. Harame, E. Ganin, et al.
IEDM 1991
When a high dose of As is implanted (e.g., 25 keV, 3×1015 cm-2) into B-doped Si and the sample is subsequently annealed at 900°C/5 min, pronounced segregation of the B into the implanted region occurs. This creates a B-depleted region beyond the As profile. It is demonstrated that the B segregation is driven primarily by the implantation induced damage rather than by As-B chemical and/or by electric field effects. The B segregation is nearly complete after a relatively low temperature (≲600°C/30 min) anneal. Two-dimensional device simulations show that the B depletion observed here can account for ≅50 mV threshold voltage roll off (at a drain bias of 0.1 V) in a Si metal-oxide-semiconductor field effect transistor of 0.2 μm gate length.
D.L. Harame, E. Ganin, et al.
IEDM 1991
G. Shahidi, J. Warnock, et al.
VLSI Technology 1993
Zhibin Ren, G. Pei, et al.
VLSI Technology 2008
D.K. Sadana, H.J. Hovel, et al.
IEEE International SOI Conference 1993