Publication
IEEE Electron Device Letters
Paper

Analysis and modeling of threshold voltage mismatch for CMOS at 65 nm and beyond

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Abstract

This letter investigates random dopant fluctuation transistor mismatch. The dominance of the halo implant is demonstrated experimentally and with simulation, and a compact model form is developed for improved representation of the phenomenon. © 2008 IEEE.

Date

01 Jul 2008

Publication

IEEE Electron Device Letters

Authors

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