Peter Klim, John Barth, et al.
VLSI Circuits 2008
A new DRAM sensing approach that uses variable precharge voltage has been developed and analyzed in simulations. It uses a voltage swing only on the bit-line connected to the accessed cell. The bit-line precharge voltage varies from one RAS cycle to the next, depending on the level of the data in the accessed cell. The reference voltage for bit-line sensing is given by a new reference-cell control circuit without using a reference-voltage generator. The current required for sensing decreases as the precharge voltage increases, resulting in reduced power without any reduction of the sensing signal. Detailed analysis shows that the sensing current is only 2/3 of that in 1/2 VDD sensing, even in the worst case. © 1995 IEEE
Peter Klim, John Barth, et al.
VLSI Circuits 2008
Toshiaki Kirihata, Hing Wong, et al.
IEEE Journal of Solid-State Circuits
Lewis M. Terman
ISSCC 1975
Brian L. Ji, Seiji Munetoh, et al.
VLSI Circuits 2003