A scalable modular architecture for SDH/SONET technology

Abstract

A scalable architecture for integrated SDH/SONET framers is presented. It exploits the fact that not only those framer functions that are obviously suited for parallel processing but all SDH/SONET overhead processing and most of the payload processing functions can be implemented as distributed algorithms. Thereby an M×STM-N framer also handles STM-M×N and STM-(M×N)c frames. These distributed algorithms cover frame scrambling, overhead byte processing, ATM and PPP payload handling, and interface implementations. A series of modular building blocks for this architecture and first complete framers is now available.