In this paper we propose a highly efficient statistical simulation methodology based on sample reuse. In the event of design re-centering, multiple manufacturing variability corners, or statistical sensitivity analysis the methodology enables design yield estimations at no additional cost to the reference center analysis. Sample points from the reference center statistical simulation can be utilized to estimate the yield at multiple neighboring centers. The capabilities of the methodology are further extended by projecting the new center onto the critical fail/sampling direction of the reference simulation. This improves the accuracy of the estimate and widens the scope of application. Theoretical applications and analysis of state of the art memory designs indicate excellent yield estimate matching and several orders of magnitude of speedup due to sample reuse. © 2012 IEEE.