About cookies on this site Our websites require some cookies to function properly (required). In addition, other cookies may be used with your consent to analyze site usage, improve the user experience and for advertising. For more information, please review your options. By visiting our website, you agree to our processing of information as described in IBM’sprivacy statement. To provide a smooth navigation, your cookie preferences will be shared across the IBM web domains listed here.
Publication
SiRF 2008
Conference paper
65nm SOI CMOS SoC technology for low-power mmwave and RF platform
Abstract
An RF and mmWave platform developed in 65nm SOI CMOS technology is presented. The SOI FET performance in a wired cell is measured up to f T=300GHz and 200GHz for NFET and PFET. Ring oscillator records 3.6psec minimum inverter stage delay. Back-end-of-line Vertical Native Capacitor (VNCAP) and on-chip inductor performances are reported. The performance scaling trends of mmWave PLL front-end components are presented. © 2008 IEEE.