About cookies on this site Our websites require some cookies to function properly (required). In addition, other cookies may be used with your consent to analyze site usage, improve the user experience and for advertising. For more information, please review your options. By visiting our website, you agree to our processing of information as described in IBM’sprivacy statement. To provide a smooth navigation, your cookie preferences will be shared across the IBM web domains listed here.
Publication
SiRF 1998
Conference paper
1.0-V and 1.5-V operation of 4-GHz tuned amplifiers implemented in a 0.1-μm CMOS technology on bulk and SOI substrates
Abstract
4-GHz 1.5-V tuned amplifiers are implemented using a partially-scaled double-level-metal 0.1-μm CMOS process on bulk and SOI substrates. The bulk and SOI amplifiers have forward transducer gains (S21) of 14 and 11 dB at VDD=1.5 V. The bulk amplifier has Fmin's of 3.6 and 4.5 dB at 3 and 4 GHz, respectively, with a power consumption of about 28 mW. When the supply voltage is reduced to 1.0 V, Fmin is increased to 4.4 and 5.0 dB at 3.0 and 4.0 GHz, while the peak gain and power consumption are lowered to 9 dB and 12.7 mW, respectively, which are not significantly worse than those of 5.8-GHz silicon bipolar LNA's.