Robert Philhower

Pronouns

He/Him/His

Title

FHE acceleration architecture, AI chiplets
Robert Philhower

Bio

Education

B.S., M.Eng. and PhD in Computer Systems Engineering from Rensselaer Polytechnic Institute.

Thesis: Spartan RISC Architecture For Yield-Limited technologies

Current Research Interests

Processor and accelerator architecture
Fully homomorphic encryption Design Automation and Logic Synthesis
Microprocessor physical design
Custom Circuit Design
High-level Synthesis
Design Productivity

Product Contributions

Recently have been working on the architecture and µarchitecture of accelerators for data-oblivious computing.

Until recently I had been a physical design lead, primarily instruction flow (fetch, decode, sequencing, completion) but have built a few floating-point multipliers as well. Serving as functional unit lead with a team of 15-20 designers.

Enterprise systems: Power 4, Power 5, Power 7, Power 8, Power 9, Power 10 , Power 11
Consumer systems: PlayStation 3, Xbox 360