HVC 2010
Haifa Verification Conference 2010
October 5-7, 2010
Organized by IBM R&D Labs in Israel
Program |
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October 04, 2010 - Tutorials | |
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Tutorial Location: CRI |
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09:30 | Registration |
10:00 |
Understanding Transactional Memory, João Lourenço, New University of Lisbon |
12:00 | Lunch |
13:30 |
Challenges and Solutions in uCode Verification, Eli Singerman, Intel |
15:30 | Break |
16:00 |
Testing and Debugging Concurrent Software – Challenges and Solutions, Shmuel Ur |
18:00 | End of Tutorials Day |
October 05, 2010 | |
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09:00 | Registration |
09:30 |
Opening Remarks, Oded Cohn, Director, IBM Research - Haifa |
10:00 |
Special Session in Memory of Amir Pnueli Session Chair: Martin Golumbic, University of Haifa Personal Remarks, David Harel, Weizmann Institute of Science Temporal Logic and Model Checking, Orna Grumberg, Technion |
11:00 | Break |
11:30 |
Parameterized System Verification, Lenore Zuck, University of Illinois Synthesis of Temporal Logic, Roderick Bloem, Graz University of Technology |
13:00 | Lunch |
14:30 |
Invited Talk: (How) Did You Specify Your Test Suite?, Helmut Veith, Vienna University of Technology |
15:30 |
Paper Session I: Hardware Simulation Session Chair: Alan Hu Feedback-based Coverage-Directed Test Generation: An Industrial Evaluation, Charalambos Ioannides, Geoff Barrett, and Kerstin Eder winner of the best paper award Reaching Coverage Closure in Post-Silicon Validation, Allon Adir, Amir Nahir, Avi Ziv, Charles Meissner, and John Schumann |
16:30 | Break |
17:00 |
Paper Session II: Hardware Simulation Session Chair: Eyal Bin vlogsl: A Strategy Language for Simulation-based Verification of Hardware, Michael Katelman and Jose Meseguer Advances in Simultaneous Multithreading Testcase Generation Methods, John Ludden, Michal Rimon, Bryan Hickerson, and Allon Adir |
18:00 | Reception and Students Event |
October 06, 2010 | |
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09:00 | Registration |
09:30 |
Special Session on Debugging Session Chair: Ronny Morad On Debugging, Yoav Hollander, Cadence Alan Hu, University of British Columbia João Lourenço, New University of Lisbon |
11:30 | Break |
12:00 |
Invited Talk: Verification Failures: What to Do When Things Go Wrong, Valeria Bertacco, University of Michigan |
13:00 |
Paper Session III: Formal Verification Session Chair: Ian Hariss Debugging Unrealizable Specifications with Model-Based Diagnosis, Robert Koenighofer, Georg Hofferek, and Roderick Bloem Revisiting Synthesis of GR(1) Specifications, Uri Klein and Amir Pnueli |
14:00 | Take-away lunch and prepare for excursion |
14:30 | Leave for excursion |
October 07, 2010 | |
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08:30 | Registration |
09:00 |
HVC Award Presentation, Clark Barrett, Leonardo De-Moura, Silvio Ranise, Aaron Stump, and Cesare Tinelli |
10:00 |
Paper Session IV: Formal Verification Session Chair: Kerstin Eder SAT-Solving Based on Boundary Point Elimination, Eugene Goldberg and Panagiotis Manolios Parallelizing A Symbolic Compositional Model-Checking Algorithm, Ariel Cohen, Kedar Namjoshi, Yaniv Sa'ar, Lenore Zuck, and Katya Kisyova |
11:00 | Break |
11:30 |
Invited Talk: Abstraction-Guided Synthesis of Synchronization, Eran Yahav, IBM T.J. Watson Research Center |
12:30 |
Invited Talk: Schizophrenic Perspective on Software Testing, Yossi Gil, Technion |
13:30 | Lunch |
15:00 | Best Paper Award |
15:15 |
Invited Talk: Static and Dynamic Verification Challenges in Securing Web Applications, Omri Weisman, Watchfire |
16:15 |
Paper Session V: Formal Verification Session Chair: Orna Raz An Efficient and Flexible Approach to Resolution Proof Reduction, Simone Fulvio Rollini, Roberto Bruttomesso, and Natasha Sharygina Variants of LTL Query Checking, Hana Chockler, Arie Gurfinkel, and Ofer Strichman |
17:15 | Closing Remarks |