Publications

6 results at ISSCC 2008

A 2.6mW 370MHz-to-2.5GHz open-loop quadrature clock generator
- - Kyu-Hyoun Kim
  - Paul W. Coteus
  - et al.
- 2008
- ISSCC 2008
A modular all-digital PLL architecture enabling both 1-to-2GHz and 24-to-32GHz operation in 65NM CMOS
- - A. Rylyakov
  - J. Tierno
  - et al.
- 2008
- ISSCC 2008
Completely digital on-chip circuit for local-random-variability measurement
- - Rahul Rao
  - Keith A. Jenkins
  - et al.
- 2008
- ISSCC 2008
A 32kb 10T subthreshold SRAM array with bit-interleaving and differential read scheme in 90nm CMOS
- - Ik Joon Chang
  - Jae-Joon Kim
  - et al.
- 2008
- ISSCC 2008
A T-coil-enhanced 8.5Gb/s high-swing source-series-terminated transmitter in 65nm bulk CMOS
- - Marcel Kossel
  - Christian Menolfi
  - et al.
- 2008
- ISSCC 2008
A <5mW/Gb/s/link, 16×10Gb/s bi-directional single-chip CMOS optical transceiver for board-level optical interconnects
- - Clint Schow
  - Fuad Doany
  - et al.
- 2008
- ISSCC 2008