Systematic study of workfunction engineering and scavenging effect using NiSi alloy FUSI metal gates with advanced gate stacks
- Y.-H. Kim
- C. Cabral Jr.
- et al.
- 2005
- IEDM 2005
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18 results at IEDM 2005
Interconnect Issues post 45nm
- S.M. Rossnagel
- Robert L. Wisnieff
- et al.
- 2005
- IEDM 2005
High performance CMOS bulk technology using direct silicon bond (DSB) mixed crystal orientation substrates
- Chun-Yung Sung
- Haizhou Yin
- et al.
- 2005
- IEDM 2005
The Micro to Nano Addressing Block (MNAB)
- K. Gopalakrishnan
- R.S. Shenoy
- et al.
- 2005
- IEDM 2005
High performance gate first HfSiON dielectric satisfying 45nm node requirements
- M.A. Quevedo-Lopez
- S. Krishnan
- et al.
- 2005
- IEDM 2005
Integration and optimization of embedded-SiGe, compressive and tensile stressed liner films, and stress memorization in advanced SOI CMOS technologies
- M. Horstmann
- A. Wei
- et al.
- 2005
- IEDM 2005
Stress memorization in high-performance FDSOI devices with ultra-thin silicon channels and 25nm gate lengths
- D. Singh
- J. Sleight
- et al.
- 2005
- IEDM 2005
SOI 90-nm ring oscillator sub-ps model-hardware correlation and parasitic-aware optimization leading to 1.94-ps switching delay
- Jean-Olivier Plouchart
- Jonghae Kim
- et al.
- 2005
- IEDM 2005
From DRAM to SRAM with a novel SiGe-based negative differential resistance (NDR) device
- Liang Yue
- Kailash Gopalakrishnan
- et al.
- 2005
- IEDM 2005
An integrated methodology for accurate extraction of S/D series resistance components in nanoscale MOSFETs
- Seong-Dong Kim
- Shreesh Narasimha
- et al.
- 2005
- IEDM 2005