EUV patterned gate variation reduction in next generation transistor architectures
- Gopal Kenath
- Martin Burkhardt
- et al.
- 2024
- SPIE Advanced Lithography + Patterning 2024
Publications
Novel ellipsometry-based machine learning technique for characterization of low sensitivity critical dimensions within gate-all-around transistors
- Houssam Chouaib
- Valeria Dimastrodonato
- et al.
- 2024
- SPIE Advanced Lithography + Patterning 2024
From Lab to Fab - In-line SIMS for Process Control in Nanosheet Gate-All-Around Device Manufacturing
- Stefan Schoeche
- Katherine Sieg
- et al.
- 2024
- SPIE Advanced Lithography + Patterning 2024
Large Feature Wafer Level In-Line Optical Metrology Techniques for Advanced Packaging Schemes
- Katherine Sieg
- Chris Bottoms
- et al.
- 2024
- SPIE Advanced Lithography + Patterning 2024
11.4 IBM NorthPole: An Architecture for Neural Network Inference with a 12nm Chip
- 2024
- ISSCC 2024
A 12nm Linux-SMP-Capable RISC-V SoC with 14 Accelerator Types Distributed Hardware Power Management and Flexible NoC-Based Data Orchestration
- Maico Cassel Dos Santos
- Tianyu Jia
- et al.
- 2024
- ISSCC 2024
A Software-Assisted Peak Current Regulation Scheme to Improve Power-Limited Inference Performance in a 5nm AI SoC
- Monodeep Kar
- Joel Silberman
- et al.
- 2024
- ISSCC 2024
Adversarial Attacks on Fairness of Graph Neural Networks
- Binchi Zhang
- Yushun Dong
- et al.
- 2024
- ICLR 2024
Neural Active Learning Beyond Bandits
- Yikun Ban
- Ishika Agarwal
- et al.
- 2024
- ICLR 2024
Max-Sliced Mutual Information
- Dor Tsur
- Ziv Goldfeld
- et al.
- 2023
- NeurIPS 2023