A 14 nm embedded STT-MRAM CMOS technology
- Daniel C. Edelstein
- M. Rizzolo
- et al.
- 2020
- IEDM 2020
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3 results for E. R. Evarts
First Experimental Demonstration of MRAM Data Scrubbing: 80 Mb MRAM with 40 nm junctions for Last Level Cache Applications
- H. Wu
- V. Katragadda
- et al.
- 2021
- IEDM 2021
Key parameters affecting STT-MRAM switching efficiency and improved device performance of 400°C-compatible p-MTJs
- Guohan Hu
- M. G. Gottwald
- et al.
- 2017
- IEDM 2017