3D stacking of chips with electrical and microfluidic I/O interconnects
- Calvin R. King Jr.
- Deepak Sekar
- et al.
- 2008
- ECTC 2008
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10 results for Muhannad S. Bakir
'Trimodal' wafer-level package: Fully compatible electrical, optical, and fluidic chip I/O interconnects
- Muhannad S. Bakir
- Bing Dang
- et al.
- 2007
- ECTC 2007
A 3D-IC technology with integrated microchannel cooling
- Deepak Sekar
- Calvin King
- et al.
- 2008
- IITC 2008
Power delivery for 3D chip stacks: Physical modeling and design implication
- Gang Huang
- Muhannad Bakir
- et al.
- 2007
- IEEE Topical Meeting EPEPS 2007
Optimal implementation of sea of leads (SoL) compliant interconnect technology
- Bing Dang
- Chirag Patel
- et al.
- 2004
- IITC 2004
Through-silicon vias: Drivers, performance, and innovations
- Paragkumar A. Thadesar
- Xiaoxiong Gu
- et al.
- 2016
- IEEE Transactions on CPMT
Integrated microfluidic cooling and interconnects for 2D and 3D chips
- Bing Dang
- Muhannad S. Bakir
- et al.
- 2010
- IEEE Transactions on Advanced Packaging
Sea-of-Leads MEMS I/O interconnects for low-k IC packaging
- Bing Dang
- Muhannad S. Bakir
- et al.
- 2006
- JMEMS
Electrical test strategies for a wafer-level packaging technology
- David C. Keezer
- Chirag S. Patel
- et al.
- 2003
- IEEE Transactions on Electronics Packaging Manufacturing
Sea of leads (SoL) ultrahigh density wafer-level chip input/output interconnections for gigascale integration (GSI)
- Muhannad S. Bakir
- Hollie A. Reed
- et al.
- 2003
- IEEE Transactions on Electron Devices