About cookies on this site Our websites require some cookies to function properly (required). In addition, other cookies may be used with your consent to analyze site usage, improve the user experience and for advertising. For more information, please review your options. By visiting our website, you agree to our processing of information as described in IBM’sprivacy statement. To provide a smooth navigation, your cookie preferences will be shared across the IBM web domains listed here.
Resistive Memory Process Optimization for High Resistance Switching Toward Scalable Analog Compute Technology for Deep Learning
- Youngseok Kim
- Soon-Cheon Seo
- et al.
- 2021
- IEEE Electron Device Letters