A 220-mm2, four- and eight-bank, 256-Mb SDRAM with single-sided stitched WL architecture
- Toshiaki Kirihata
- Martin Gall
- et al.
- 1998
- IEEE Journal of Solid-State Circuits
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A 286 mm2 256 Mb DRAM with ×32 both-ends DQ
- Yohji Watanabe
- Hing Wong
- et al.
- 1996
- IEICE Transactions on Electronics