MEC: Memory-efficient convolution for deep neural network
- M. Cho
- Daniel Brand
- 2017
- ICML 2017
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20 results for M. Cho
History-based VLSI legalization using network flow
- Minsik Cho
- Haoxing Ren
- et al.
- 2010
- DAC 2010
TROY: Track router with yield-driven wire planning
- Minsik Cho
- Hua Xiang
- et al.
- 2007
- DAC 2007
Enabling real-time multi-messenger astrophysics discoveries with deep learning
- E. A. Huerta
- Gabrielle Allen
- et al.
- 2019
- Nature Reviews Physics
A unified approximation framework for compressing and accelerating deep neural networks
- Yuzhe Ma
- Ran Chen
- et al.
- 2019
- ICTAI 2019
LatchPlanner: Latch placement algorithm for datapath-oriented high-performance VLSI designs
- Minsik Cho
- Hua Xiang
- et al.
- 2013
- ICCAD 2013
Network flow based datapath bit slicing
- Hua Xiang
- Minsik Cho
- et al.
- 2013
- ISPD 2013
Optimal layout decomposition for double patterning technology
- Xiaoping Tang
- Minsik Cho
- 2011
- ICCAD 2011
Novel binary linear programming for high performance clock mesh synthesis
- Minsik Cho
- David Z. Pan
- et al.
- 2010
- ICCAD 2010
CAD for double patterning lithography
- David Z. Pan
- Jae-Seok Yang
- et al.
- 2010
- ICICDT 2010