E. Burstein
Ferroelectrics
We discuss novel multi-level write algorithms for phase change memory which produce highly optimized resistance distributions in a minimum number of program cycles. Using a novel integration scheme, a test array at 4bits/cell and a 32kb memory page at 2bits/cell are experimentally demonstrated. © 2007 IEEE.
E. Burstein
Ferroelectrics
A.B. McLean, R.H. Williams
Journal of Physics C: Solid State Physics
Biancun Xie, Madhavan Swaminathan, et al.
EMC 2011
Ronald Troutman
Synthetic Metals