Journal of the IEICE

Paper

01 Aug 2015

Wafer bumping technologies

Conference paper

Vertical integration after stacking (ViaS) process for low-cost and low-stress 3D silicon integration

Kuniaki Sueoka, Akihiro Horibe, et al.

3DIC 2015

Conference paper

Plating-free Bumping by Cu Nanopaste and Injection Molded Solder (IMS) for Fine Pitch Flip Chip Joining

Toyohiro Aoki, Eiji Nakamura, et al.

ECTC 2020

Paper

Characterization of sintered Cu nanopaste for micro-bumping with Injection Molded Solder technology

Eiji Nakamura, Toyohiro Aoki, et al.

Advancing Microelectronics

Conference paper

Solder Injected through Via for Multi Stacked Wafers

Akihiro Horibe, Kuniaki Sueoka, et al.

ECTC 2016

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