Conference paperVolume-controllable Solder Bumping Technology to Package Substrate Using Injection Molded Solder for Fine-pitch Flip ChipToyohiro Aoki, Katsuyuki Sakuma, et al.ECTC 2023
Conference paperVertical integration after stacking (ViaS) process for low-cost and low-stress 3D silicon integrationKuniaki Sueoka, Akihiro Horibe, et al.3DIC 2015
Conference paperScaling challenges of semiconductor packaging in the era of big dataYasumitsu Orii, Akihiro Horibe, et al.IMAPS 2013
Conference paperThrough silicon via process for effective multi-wafer integrationAkihiro Horibe, Kuniaki Sueoka, et al.ECTC 2015
