The current Superconductive Computer Technology utilizes the Superconductive Tunneling Device (STD) or tunnel junction exhibiting the Josephson and Giaever Effects as the active element. The experimental integrated circuit technology also comprises superconducting transmission lines, and the usual passive components. On a device level, the STD's possess a large intrinsic speed and power advantage over semiconductor devices. (Device switching times are a few tens of picoseconds and the power levels are in the microwatt range.) These device properties imply that very powerful but physically small computer systems should be possible. This paper describes the technology, the devices, logic circuits, memory cells which have been developed to date. The most complex experimental circuit made to date is a 4 bit wide multiplier network of 45 circuits on a 6.4 × 6.4 mm<sup>2</sup> chip, powered and clocked externally. In this chip, fabricated by an experimental 25µm linewidth technology, a loaded logic circuit delay of about 270 ps/stage was achieved. Copyright © 1976 by The Institute of Electrical and Electronics Engineers, Inc.