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Publication
ESSDERC 2002
Conference paper
Suitability of scaled SOI CMOS for high-frequency analog circuits
Abstract
In this paper we show that the ability of SOI NMOS transistors to function as high-bandwidth amplifiers continuously improves as gate length shrinks below 50 nm. fT of 196 GHz is achieved at Lpoly = 47 nm. Neither the transconductance nor the input capacitance reaches a limiting value at Lpoly = 47 nm. The gate sheet resistance, which influences the FET input resistance and high-frequency noise, shows little variation and is an acceptable value (7Ω/square) in the Lpoly = 55 nm to 77 nm range. We also present four features of an aggressively scaled 0.13-μm partially-depleted SOI CMOS technology that show its suitability for high-frequency circuit applications: RF noise performance comparable to state-of-the art III-V devices, body-tied SOI FETs that achieve the same low-frequency noise as bulk FETs, a multilevel back-end that allows high-density and high-Q passives, and negligible floating-body-induced jitter in RF circuits.