K.-L. Lee, M.M. Frank, et al.
VLSI Technology 2006
Stress induced charge trapping effects in SiO2/Al 2O3 gate stacks were investigated. Current-voltage (I-V) and capacitance-voltage (C-V) sensing techniques were used. The results show a strong asymmetric charge trapping effects which is due to asymmetry of the SiO2/Al2O3 and difference in work function between the TiN electrode and the Si substrate.
K.-L. Lee, M.M. Frank, et al.
VLSI Technology 2006
F.R. McFeely, E. Cartier, et al.
Physical Review B
Sandip Tiwari, Paul M. Solomon, et al.
Microelectronic Engineering
Sufi Zafar, A. Kerber, et al.
VLSI Technology 2014