In this paper we explore techniques for 8T SRAM that allow near threshold voltage (NTV) operation as well as improved functionality across a wide voltage range. Operating in these voltage regimes will be crucial for emerging hardware paradigms, such as IoT (internet-of-things) and throughput oriented accelerators, e.g., deep learning accelerators, that will target lower voltages than conventional processors. We present several programmable enhancements to the recently proposed voltage supply boosting technique for further reducing Vmin as well as adapting to various operating conditions. These enhancements allow for a reduction in the power required for boosting through optimizing boost buffer sizes and shaping the boost pulse width. Furthermore, adjusting the boost pulse phase allows for additional Vmin reduction as well as faster read access times. These programmable booster techniques are demonstrated in a 2nd generation test chip in 14nm FinFET SOI technology.