Practical Considerations for RF Measurements of Cryogenic CMOS Circuits for Quantum Computing

Abstract

Cryogenic CMOS control and readout electronics for quantum computing using superconducting qubits offers several potential advantages versus the use of room temperature electronics, including reduced wiring and lower cost per control channel. The development and practical implementation of such electronics at a mass-production scale for systems with tens of thousands of channels, however, requires circuit characterization in the target cryogenic use environment and with interfaces as close as possible to those that will be used in a real quantum machine. The cryogenic use environment and interfaces for test are usually far from the almost ideal conditions that can be achieved in a regular cryogenic probe station. In this paper, we describe a new testbed for the characterization of CMOS circuits at cryogenic temperatures that solves some of these problems.