Conference paperInterface state generation in pFETs with ultra-thin oxide and oxynitride on (100) and (110) Si substratesJ.H. Stathis, R. Bolam, et al.INFOS 2005
Conference paperHigh-performance sub-0.08 μm CMOS with dual gate oxide and 9.7 ps inverter delayM. Hargrove, S.W. Crowder, et al.IEDM 1998
Conference paperCoupling analysis of through-silicon via (TSV) arrays in silicon interposers for 3D systemsBiancun Xie, Madhavan Swaminathan, et al.EMC 2011
