MOSFET miniaturization - From one micron to the limits

Abstract

A review of the status of current 1 μm NMOS and CMOS advanced technologies is followed by a discussion of design and technology approaches to submicron MOSFET's. Fundamental limits to miniaturization are reviewed for both devices and interconnections and for dynamic RAM as well as logic applications. The impact of low-temperature operation on miniaturized structures is also discussed. © 1985.