MST Kongress 2021
Conference paper

Monolithic integration of in-plane hybrid III-V/Si photonic devices

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Efficient active devices for light emission are the major missing piece in the otherwise highly advanced and low-cost silicon photonics platform. III-V semiconductors would be ideally suited for this; especially monolithic integration of the III-V material is challenging but ultimately desirable for scalable integrated circuits. Here we focus on integrated hybrid III-V/Si light emitters achieved using an integration technique called template-assisted selective epitaxy (TASE). This method relies on selective replacement of a prepatterned silicon structure with III-V material and thereby achieves self-aligned and in-plane monolithic integration of III-Vs on silicon. We discuss light emitters based on hybrid III-V/Si photonic crystal structures and highlight the benefits of locally placing the active material with high overlap to the photonic mode. This opens a new path towards realizing fully integrated, densely packed and scalable photonic integrated circuits.