About cookies on this site Our websites require some cookies to function properly (required). In addition, other cookies may be used with your consent to analyze site usage, improve the user experience and for advertising. For more information, please review your options. By visiting our website, you agree to our processing of information as described in IBM’sprivacy statement. To provide a smooth navigation, your cookie preferences will be shared across the IBM web domains listed here.
Publication
IEEE Electron Device Letters
Paper
Kink-free SOI analog circuit design with floating-body/NFD MOSFET's
Abstract
A novel design approach to ensure general kink-free operation of floating-body/nonfully depleted (NFD) SOI analog circuits is described. The approach involves optimization of the bias and aspect ratios of all transistors that determine gain and current in a circuit such that they operate only in their kink-free voltage windows. The approach is demonstrated via a simulation-based design of the current cells of a 10-b floating-body/NFD DAC that shows good linearity and resolution at dc and frequencies up to 1 GHz. In contrast, the floating-body/NFD DAC without proper optimization shows poor and prohibitive performance.