ISCAS 2024

How to Model the Training and Inference of Analog-Based In-Memory Computing (AIMC) Systems

View code


AIMC is a promising approach to reduce the latency and energy consump6on of Deep Neural Network (DNN) inference and training. However, the noisy and non-linear device characteristics, and the non-ideal peripheral circuitry in AIMC chips, require adapting DNNs to be deployed on such hardware to achieve equivalent accuracy to digital computing. While traditional SPICE-based simulations can be used to model these systems, they require a significant number of resources, and are typically not feasible to run for large and complex DNNS, such as Large Language Models (LLMs) that currently dominate the Deep Learning (DL) landscape. Instead, customized simulation frameworks can be used to efficiently and accurately model key circuit and device behavior. The IBM recently released IBM Analog Hardware Acceleration Kit (AIHWKit), freely available at, is one such framework capable of performing inference and training of DNNs using AIMC. In this tutorial, we provide a deep dive into how inference and training can be performed using the AIHWKit, and how users can expand and customize AIHWKit for their own needs. Participants will be equipped with practical skills to model the training and inference of complex analog in-memory computing systems, using models developed from experimental data.