Frequency dependent behavior of a high performance dynamic register file in 1.8 V, 0.25 μm SOI technology

Abstract

High performance register files are essential in fixed or floating point units of a high performance microprocessor. In this paper, the frequency dependent behavior of access time and pulse width of the dynamic register file and the circuit techniques to achieve robust operation in 1.8 V, 0.25 μm partially depleted (PD) SOI technology are addressed.