Faster IC analysis with PICA spatial temporal photon correlation and CAD autochanneling

Abstract

To reduce PICA (Picosecond Imaging Circuit Analysis) acquisition time, we have developed a Spatial Temporal Photon Correlation approach (STPC-3D). Using a reduced CAD layout, the area where light emission may be detected is calculated in the CAD autochanneling process. Acquisition time is cut down from hours to minutes. A case study highlighting the significant time reduction for fault localization with PICA is presented in the document. © 2003 Elsevier Ltd. All rights reserved.