SPIE Advanced Lithography 2011
Conference paper

Extending photo-patternable low-κ concept to 193 nm lithography and e-beam lithography

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Increasing complexity and manufacturing costs, along with the fundamental limits of planar CMOS devices, threaten to slow down the historical pace of progress in the semiconductor industry. We have proposed and demonstrated proof-of-concept of a simple and low-cost way to fabricate dual-damascene copper (Cu) on-chip interconnect or Back-End-Of-the-Line (BEOL) structures using a novel multifunctional on-chip electrical insulator called a photo-patternable low dielectric constant (low-κ) dielectric (PPLK) material [Q. Lin, et al, Proc. SPIE, 2010]. This demonstration was accomplished with a silsesquioxane-based (SiCOH), κ=2.7 material which is compatible with 248 nm optical lithography. In this paper, we report on the extension of the photo-patternable low-κ concept to the ultra-low-κ (κ<2.5) regime and resolution down well below 100 nm with 193 nm lithography as well as e-beam lithography. We have accomplished this demonstration using the same silsesquioxane-based (SiCOH) material platform as that of the 248 nm photo-patternable low-κ materials. The 193 nm photo-patternable low-κ materials possess dielectric constants below 2.5 and are able to resolve 100 nm half-pith line/space features with dry 193 nm single exposure lithography. The resolution of photo-patternable low-κ materials can be pushed down to 40 nm half-pith line and space features with a line-edge-roughness less than 3.0 nm with e-beam lithography. © 2011 SPIE.