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Paper
Electron-Optical Masking of Semiconductor Structures
Abstract
Electron-optical techniques were employed to fabricate planar silicon transistors having a 1-micron strip width and a combined dimensional and registration tolerance of 1000 Å. A new electron-sensitive positive resist was used to define a conventional oxide diffusion mask. The exposure equipment is described and electrical parameters of the complete device are given. Copyright © 1970 by The Institute of Electrical and Electronics Engineers, Inc.