ELECTRICAL CHARACTERIZATION OF SILICON SURFACES EXPOSED TO RIE.

Abstract

Electrical measurements have been used to study the consequences of Reactive Ion Etching exposure of a silicon surface. SiO//2/Si selective RIE has been studied with C-t, I-V, C-V and DLTS using MOS capacitors and Schottky diodes. Electrical behavior of these devices was found to depend on RIE processing variables, the etch rate of silicon and surface exposure time. An MIS diode model was applied for a quantitative estimate of interface-state concentration and interfacial-layer thickness. Measurements after various post-RIE surface treatments, such as: oxidation, conventional-furnace or rapid-thermal annealing, suggest recovery possibilities.