This article presents an extensive experimental investigation of transport properties in 10-nm CMOS Bulk FinFETs at cryogenic temperatures. The split-CV technique is employed to analyze the effective electron and hole mobilities from 300 to 10 K. Temperature and length dependence of effective mobilities is explored taking into account different scattering mechanisms. Hole mobilities were found to be dominated by temperature-independent neutral defects and surface scattering events for short-channel devices at low temperatures; while for electron mobilities, degeneracy effects at the cryo-temperature result in mobility enhancement at high fields. The short-channel devices show significant mobility degradation and weaker temperature dependence which could limit their utility for high-speed cryogenic-CMOS-based circuits. Variation of electrical parameters, such as subthreshold swing (SS), equivalent oxide thickness (EOT), threshold voltage, and effective length with temperature is also discussed. For accurately capturing the effective mobility trends in the specified temperature range along with the threshold voltage and SS trends, the existing BSIM-CMG 110.0.0 compact model equations are modified. The proposed model is validated across different device geometries of the short-channel bulk FinFETs fabricated with industry-standard 10-nm layout rules.