Direct silicon bonded (DSB) substrate solid phase epitaxy (SPE) integration scheme study for high performance bulk CMOS

Two integration schemes for hybrid crystal orientation technology using direct silicon bonded (DSB) substrates and solid phase epitaxay (SPE) processes have been implemented. The shallow-trench-isolation (STI) before SPE approach suffers from trench-edge defects formed at STI edges, which causes high leakage current. The SPE-before-STI approach allows removal of edge defects of SPE by STI. SRAM in 65nm node and eDRAM in 90nm node have been demonstrated on DSB using the SPE-before-STI scheme.