Development of a 50mm dual flip chip plastic land grid array package for server applications

Abstract

For many years, the Flip Chip Plastic Ball Grid Array (FC-PBGA) has been the preferred packaging solution for microprocessors and high performance ASICs. IBM has developed a dual chip Flip Chip Plastic Land Grid Array (FC-PLGA) package to support low and mid range server solutions. This organic 50 mm × 50 mm lead reduced package solution uses a 6-4-6 build-up laminate with two large chips consisting of a processor (22 × 16 mm) and a memory cache (15 × 13 mm) in a single piece lid capping solution. In this paper, we will summarize development activities performed in order to achieve a reliable product while dissipating up to 200 Watts mostly from the microprocessor chip. One of the many key issues to overcome was the assurance of good package thermal stability with such large silicon area coverage over the flexible organic chip carrier. Special chip and module test vehicles were designed and fabricated in order to evaluate the mechanical, electrical, and thermal behaviour of the package post assembly and throughout stress testing. The assembly process development activities performed to support the desired application will be discussed in conjunction with mechanical modeling results. In addition, thermal data will be presented showing the positive results obtained as well as good correlation to the thermal and mechanical models. ©2008 IEEE.