Toke Meyer Andersen, Florian Krismer, et al.
ISSCC 2014
Paper
Design methodology for a large communication chip
Abstract
Smart chip is a large communication chip with standard-based communication interfaces, multiple clock domains, and mixed-signal components for line interfacing. This chip has been developed by focusing mainly on general design aspects.
Related
Conference paper
A 14Gb/s high-swing thin-oxide device SST TX in 45nm CMOS SOI
Christian Menolfi, Thomas Toifl, et al.
ISSCC 2011
Marcel Kossel, Christian Menolfi, et al.
ISSCC 2008
Thomas Toifl, Christian Menolfi, et al.
VLSI Circuits 2011