DDR2/DDR3 interface signal integrity analysis based on IBM generic package model

Abstract

The data rate of Double Data Rate (DDR) memory interface has become higher, Signal Integrity (SI) analysis is very important for current DDR system design to meet performance requirement. The chip/package types, board level interconnection, driver/receiver modes and power supply network are key factors for the design specification, analysis based on design applications should be performed to evaluate delay, reflection, jitter, simultaneous switching power noise, timing budget for the DDR system. This paper presents the method of performing DDR2/DDR3 interface SI simulation by using IBM Generic Package Model (GPM). ©The Electrochemical Society.