E. Gusev, E. Cartier, et al.
Microelectronic Engineering
The kinetics of charge trapping in high-κ gate stacks fabricated with ultrathin HfO 2 dielectric films was analyzed. The films were grown by atomic layer deposition and a polycrystalline silicon gate electrode. The charge trapping and detrapping were studied by measuring the threshold voltage shift of high-frequency capacitance-voltage curves as a function of charging or discharging time. The charge trapped after electron injection in the stack was unstable and decayed over time. The results show that the gate voltage, temperature and light illumination strongly affected the detrapping rate.
E. Gusev, E. Cartier, et al.
Microelectronic Engineering
Zhen Zhang, F. Pagette, et al.
VLSI-TSA 2010
E. Cartier, V. Narayanan, et al.
VLSI Technology 2004
B. Doris, M. Ieong, et al.
IEDM 2003