Wireline communication circuits often include serialisers/deserialisers using multiphase signals for multiplexing or sampling. From a power efficiency viewpoint, configurations are desired in which a single differential clock at frequency f is distributed to decentralised multiphase generators as opposed to distribution at 2f with local frequency dividers. A bang-bang phase detector (BBPD) is presented for such a multiphase generator operated from 4 to 16 GHz. Owing to the 2-octave frequency range, a wide input phase range is required for which the BBPD may not generate false locks. This is achieved by an implementation in which down pulses at the output of a fully symmetrical set/reset latch are stretched via pulse-width extension circuitries. A sampling pulse generated from one of the input phases can then easily capture the extended down pulses across a wide input phase range to unambiguously indicate phase leading or phase lagging to the control logic of the multiphase generator. The proposed circuitry has been implemented in a 7 nm CMOS technology. A comparison to alternative BBPD approaches implemented in the same technology shows that the proposed architecture outperforms them in terms of achievable input phase range.